一次中断唤醒

// Runs first in the EXTI0 vector, before embassy-stm32's handler.
struct EntryStamp;
impl Handler<EXTI0> for EntryStamp {
  unsafe fn on_interrupt() {
    stamp("EXTI0 vector entry");
  }
}

bind_interrupts!(struct Irqs {
  EXTI0 => EntryStamp, exti::InterruptHandler<EXTI0>;
});

#[embassy_executor::task]
async fn trigger() {
  Timer::after_millis(5).await;
  stamp("trigger: before SWIER write");
  pac::EXTI.swier(0).write(|w| w.set_line(0, true));
  stamp("trigger: after SWIER write");
}

#[embassy_executor::main]
async fn main(spawner: Spawner) {
  let p = embassy_stm32::init(Default::default());
  start_systick();
  let mut button = ExtiInput::new(p.PA0, p.EXTI0, Pull::Down, Irqs);
  Timer::after_millis(2).await;
  spawner.spawn(trigger().unwrap());

  stamp("waiter: before wait_for_rising_edge");
  button.wait_for_rising_edge().await;
  stamp("waiter: after .await");
  // ...
}

$(
    #[allow(non_snake_case)]
    #[unsafe(no_mangle)]
    $(#[cfg($cond_irq)])?
    $(#[doc = $doc])*
    unsafe extern "C" fn $irq() {
        unsafe {
            $(
                $(#[cfg($cond_handler)])?
                <$handler as $crate::interrupt::typelevel::Handler<$crate::interrupt::typelevel::$irq>>::on_interrupt();

            )*
        }
    }

    $(#[cfg($cond_irq)])?
    $crate::bind_interrupts!(@inner
        $(
            $(#[cfg($cond_handler)])?
            unsafe impl $crate::interrupt::typelevel::Binding<$crate::interrupt::typelevel::$irq, $handler> for $name {}
        )*
    );
)*

#[derive(Copy, Clone)]
struct Irqs;

#[allow(non_snake_case)]
#[unsafe(no_mangle)]
unsafe extern "C" fn EXTI0() {
  unsafe {
    <EntryStamp as typelevel::Handler<typelevel::EXTI0>>::on_interrupt();
    <exti::InterruptHandler<EXTI0> as typelevel::Handler<typelevel::EXTI0>>::on_interrupt();
  }
}

unsafe impl typelevel::Binding<typelevel::EXTI0, EntryStamp> for Irqs {}
unsafe impl typelevel::Binding<typelevel::EXTI0, exti::InterruptHandler<EXTI0>> for Irqs {}

08000040 R __INTERRUPTS
080001e0 T EXTI0
...
08002044 T DefaultHandler
08002044 T EXTI1
08002044 T EXTI15_10
08002044 T EXTI2

080001e0 <EXTI0>:
 80001e0:      	push	{r4, r6, r7, lr}
 80001e2:      	add	r7, sp, #0x8
 80001e4:      	bl	0x80020c8 <_critical_section_1_0_acquire> @ imm = #0x1ee0
 80001e8:      	mov	r4, r0
 80001ea:      	movw	r0, #0x3c28
 80001ee:      	movt	r0, #0x800
 80001f2:      	movs	r1, #0x12
 80001f4:      	bl	0x800087e <exti::common::stamp_cs> @ imm = #0x686
 80001f8:      	mov	r0, r4
 80001fa:      	bl	0x80020d4 <_critical_section_1_0_release> @ imm = #0x1ed6
 80001fe:      	pop.w	{r4, r6, r7, lr}
 8000202:      	b.w	0x8000a38 <embassy_stm32::exti::on_irq> @ imm = #0x832

pub fn new<T: ExtiPin + GpioPin>(
    pin: Peri<'d, T>,
    _ch: Peri<'d, T::ExtiChannel>,
    pull: Pull,
    _irq: impl Binding<
        <<T as ExtiPin>::ExtiChannel as Channel>::IRQ,
        InterruptHandler<<<T as ExtiPin>::ExtiChannel as Channel>::IRQ>,
    >,
) -> Self {

fn poll(self: Pin<&mut Self>, cx: &mut Context<'_>) -> Poll<Self::Output> {
    EXTI_WAKERS[self.pin as usize].register(cx.waker());

    let imr = cpu_regs().imr(0).read();
    if !imr.line(self.pin as _) {
        Poll::Ready(())
    } else {
        Poll::Pending
    }
}

unsafe fn on_irq() {
    cfg_no_rpr_fpr! {
        let bits = EXTI.pr(0).read().0;
    }
    // ...
    // We don't handle or change any EXTI lines above 16.
    let bits = bits & 0x0000FFFF;

    // Mask all the channels that fired.
    cpu_regs().imr(0).modify(|w| w.0 &= !bits);

    // Wake the tasks
    for pin in BitIter(bits) {
        EXTI_WAKERS[pin as usize].wake();
    }

    // Clear pending
    low_level::clear_exti_pending_mask(bits);
}

before init: IMR1 = 0xff820000
after: IMR1 = 0xff820000, PR1 = 0x00000000

     2124.500 us  +      0 ns (~     0 insn)  waiter: before wait_for_rising_edge
     2199.500 us  +  75000 ns (~   292 insn)  exec task_exec_end
     2221.250 us  +  21750 ns (~    84 insn)  exec executor_idle (-> wfe)
     7005.500 us  +4784250 ns (~ 18688 insn)  (last SysTick ISR entry)
     7043.750 us  +  38250 ns (~   149 insn)  wake -> task_ready_begin
     7080.750 us  +  37000 ns (~   144 insn)  exec poll_start
     7104.500 us  +  23750 ns (~    92 insn)  exec task_exec_begin
     7146.000 us  +  41500 ns (~   162 insn)  trigger: before SWIER write
     7166.750 us  +  20750 ns (~    81 insn)  EXTI0 vector entry
     7205.250 us  +  38500 ns (~   150 insn)  wake -> task_ready_begin
     7235.500 us  +  30250 ns (~   118 insn)  trigger: after SWIER write
     7259.750 us  +  24250 ns (~    94 insn)  exec task_exec_end
     7281.500 us  +  21750 ns (~    84 insn)  exec executor_idle (-> wfe)
     7308.750 us  +  27250 ns (~   106 insn)  exec poll_start
     7332.750 us  +  24000 ns (~    93 insn)  exec task_exec_begin
     7384.250 us  +  51500 ns (~   201 insn)  waiter: after .await
before init: IMR1 = 0xff820000
after: IMR1 = 0xff820000, PR1 = 0x00000000

     2088.500 us  +      0 ns (~     0 insn)  waiter: before wait_for_rising_edge
     2199.250 us  + 110750 ns (~   432 insn)  driver schedule_wake
                                            schedule_wake at = 7
                                            queue changed = 1
     7073.500 us  +4874250 ns (~ 19040 insn)  trigger: before SWIER write
     7094.250 us  +  20750 ns (~    81 insn)  EXTI0 vector entry
     7142.000 us  +  47750 ns (~   186 insn)  trigger: after SWIER write
     7208.750 us  +  66750 ns (~   260 insn)  waiter: after .await
before init: IMR1 = 0xff820000
after: IMR1 = 0xff820000, PR1 = 0x00000000

     7146.000 us  +  41500 ns (~   162 insn)  trigger: before SWIER write
     7166.750 us  +  20750 ns (~    81 insn)  EXTI0 vector entry
     7205.250 us  +  38500 ns (~   150 insn)  wake -> task_ready_begin
     7235.500 us  +  30250 ns (~   118 insn)  trigger: after SWIER write
     7259.750 us  +  24250 ns (~    94 insn)  exec task_exec_end
     7281.500 us  +  21750 ns (~    84 insn)  exec executor_idle (-> wfe)
     7308.750 us  +  27250 ns (~   106 insn)  exec poll_start
     7332.750 us  +  24000 ns (~    93 insn)  exec task_exec_begin
     7384.250 us  +  51500 ns (~   201 insn)  waiter: after .await